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High Performance Computing Group  seminar
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[Sep01]  [Oct01]  [Nov01]  [Dec01]  [Jan02]  [Feb02]  [Mar02]  [Apr02]  [May02]  [Jun02]  [Jul02]  [Aug02]
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Previous years: [2000-2001] [1999-2000]  [1998-1999]                                       [Past talks] [Contact]
 

 
Upcoming talks
July 2002
Date
Time/Room
Speaker
Title
Info
Wed 3 11:00
C6-E101		 Sriram Vajapeyam,
Independent Consultant, India		 Exploring Improved Cache Organizations 
Based on Page-Level Access Behavior		 Bio
Abstract
Slides
Tue 9 16:00
C6-E101		 Doug Burguer,
University of Texas at Austin		 NUCA: Non-Uniform Cache Architectures 
for Wire-Dominated On-Chip Caches		 Bio
Abstract
Tue 9 17:00
C6-E101		 Pedro Trancoso,
University of Cyprus		 In-Memory Parallelism for Database Workloads Bio
Abstract
Wed 10 11:00
C6-E101		 Doug Burguer,
University of Texas at Austin		 Polymorphic Mechanisms in the UT-Austin TRIPS Processor Bio
Abstract
Thu 11 15:00
Sala d'actes, FIB		 Luiz Barroso,
Google		 Google: Finding Needles in Terabyte Haystacks Bio
Abstract
Thu 18 10:00
C6-E101		 Luiz Barroso,
Google		 Repetition
Google: Finding Needles in Terabyte Haystacks		 Bio
Abstract
Tue 23 11:00
D6-S103		 Ronny Ronen,
Microprocessor Research Labs, Intel		 The Optimum Pipeline Depth Bio
Abstract
Mon 29 12:00
C6-E101		 David Kaeli,
Dept. of  Electrical and Computer Engineering,
Northeastern University		 Realizing High IPC Through a Scalable, Multipath Microarchitecture Bio
Abstract
Slides
August 2002
Date
Time/Room
Speaker
Title
Info
Past talks
???September 2001
Date
Time/Room
Speaker
Title
Info
Wed 12 16:30
C6-E101		 Daniel Jimenez
University of Texas at Austin		 Delay Sensitive Branch Predictors  Bio
Abstract
Wed 12 18:00
C6-E101		 Ulrich Kremer
Rutgers University		 Compiler Optimizations for Low Power and Low Energy Abstract
Thu 13 11:15
C6-E101		 Wolfgang Karl
Technische Universität München
Institut für Informatik		  An Efficient and Flexible 
Programming Environment 
for SCI-Based PC-Clusters		 Bio
Abstract
Thu 13 15:00
C6-E101		 Doug Burger
University of Texas at Austin		 A Microprocessor Design for 2014 Bio
Abstract
Thu 13 17:00
C6-E101		 Peter Hsu
Peter Hsu Consulting, Inc.		 Computer Architecture From Many Perspectives Bio
Abstract
Slides
Thu 13 18:15
C6-E101		 Oskar Mencer
Bell Labs &
Imperial College, University of London 		 Computing with FPGAs Bio
Abstract
Fri 14 15:30
C6-E101		 Ben Juurlink
Computer Engineering Laboratory
Electrical Engineering Department
Delft University of Technology		 Research at the 
Computer Engineering Laboratory of
Delft University of Technology		 Abstract
Slides
Fri 28 11:15
C6-E101		 Cristina Cifuentes
Sun Microsystems Laboratories		 Retargetable Binary Translation Bio
Abstract
Slides
October 2001
Date
Time/Room
Speaker
Title
Info
Wed 31 11:30
D6-S103		 Ron Perrott
Queen's University, Belfast		 The impact of grid computing on UK research Bio
Abstract
Slides
November 2001
Date
Time/Room
Speaker
Title
Info
Wed  14 11:15
C6-E101		 Eduard Santamaria
Computer Architecture Dept., UPC		 El compilador Pro64 Abstract
Slides
December 2001
Date
Time/Room
Speaker
Title
Info
Tue 18 11:15
C6-E101		 José Maria Peña
DATSI, Universidad Politecnica de Madrid		 Distributed (high performance & collaborative) 
data mining		 Abstract
Thu 20 12:00
C6-E101		 Enric Musoll
Clearwater Networks, Inc.		 Architectural trade-offs in building a network processor for layers 4-7 Bio
Abstract
Slides
January 2002
Date
Time/Room
Speaker
Title
Info
Tue 15 12:00
C6-E101		 Ronaldo Gonçalves
State University of Maringá,
Informatics Department		 SMT Architectures Abstract
Thu 31 15:00
C6-E101		 Assaf Schuster,
Computer Science Department, Technion		 The MultiView Method for high performance Software Distributed Shared Memory Abstract
February 2002
Date
Time/Room
Speaker
Title
Info
Fri 22 12:00
C6-E101		 Sanjay J. Patel,
           University of Illinois at Urbana-Champaign		 rePLay: A Hardware Framework 
for Dynamic Optimization		 Bio
Abstract
March 2002
Date
Time/Room
Speaker
Title
Info
Fri 1 16:00
C6-E101		 Ricardo Baeza-Yates,
Dept. of Computer Science, Engineering School, University of Chile. 		 Aplicaciones de Mineria de la Web Bio
Abstract
Tue 19 11:30
D6-S103		 Ronny Ronen,
Microprocessor Research Labs, Intel		 Power - The Next Frontier Bio
Abstract
????? 11:15
C6-E101		 Robert Cohn,
Alpha Development Group, 
Compaq Computer Corporation		 Feedback directed optimization in Compaq's compilation tools for Alpha Bio
Abstract
Slides
Paper
FriApril 2002
Date
Time/Room
Speaker
Title
Info
Wed 3 11:15
C6-E101		 Jesus Corbal,
DAC, UPC		 Supercomputing for videogames Abstract
Fri 5 11:00
D6-S103		 Peter Knijnenburg Iterative Compilation in Program Optimization
Tue 16 11:30
D6-S103		 Uri Weiser,
Intel		 Areas for Innovations in VLSI Architecture Abstract
Bio
Wed 17 11:15
C6-E101		 Enric Fontdecaba Introducció a la Derivació Automatica Abstract
Wed 17 16:00
C6-E101		 Uri Weiser,
Intel		 VLSI: Is it all about integration and performance? Trends and directions Abstract
Bio
Fri 19 11:30
D6-S103		 Daniel Jimenez,
University of Texas at Austin		 Building Better Branch Predictors Abstract
Bio
May 2002
Date
Time/Room
Speaker
Title
Info
Tue 7 11:15
D6-S103		 Gurindar S. Sohi,
University of Wisconsin-Madison		 Speculative Multithreading: from Multiscalar to MSSP Abstract
Bio
Wed 8 11:15
C6-E101		 Gurindar S. Sohi,
University of Wisconsin-Madison		 Exploiting Value Locality in Physical Register File Design Abstract
Bio
Wed 15 11:00
Sala d'actes de la FIB		 John L. Hennessy, 
Stanford University		 What will be the future of Computer Architecture? Bio
Thu 16 11:30
D6-S103		 Prof. Enrico Clementi, 
Univ. d'Stratsburg, França		 Parallelism and Computational Chemistry Abstract
Bio
Tue 21 12:00
D6-S103		 Roger Espasa,
DAC, UPC		 Tarantula: A Vector Extension to the Alpha Architecture Abstract
Paper
June 2002
Date
Time/Room
Speaker
Title
Info
Fri 7 12:00
C6-E101		 Paolo Ienne,
Processor Architecture laboratory,
Ecole Politechinque Federale de Lausanne		 Automatic processor specialisation
using ad-hoc functional units		 Bio
Abstract
Slides
Mon 10 11:00
D6-S103		 Dr. Bernd Mohr ,
Research Centre Juelich 
Prof. Dr. Allen Malony,
University of Oregon		 EXPERT Performance Analysis Tools 
for Mixed-Mode Parallel Systems		 Abstract
Fri 21 11:00
D6-S103		 Dr. Chung-Jen Tan,
E-Business Technology Institute, 
Hong Kong University		 Research and Technology Programs at The E-Business Technology Institute Bio
Abstract
Fri 28 11:00
D6-S103		 Prof. Graham Megson,
School of Computer Sience, Cybernetics & Electronic Engineering,
University of Reading		 Dynamic Recurrence Mappings Bio
Abstract
Fri 28 12:00
D6-S103		 Prof. Vassil Alexandrov,
School of Computer Sience, Cybernetics & Electronic Engineering,
University of Reading		 Solving large scale problems and grid computing Bio
Abstract
???? 11:15
C6-E101		 Toni Juan,
DAC, UPC		 BSSAD: Intel Microprocessor Advanced Development Lab
(past, present and future)		  
???? 11:15
C6-E101		 Roger Espasa,
DAC, UPC		 ASIM: A performance model framework Abstract
Paper
Contact

Any comment? Ideas? Proposals? Please contact with Toni Juan


Other Architecture Seminars

University of Wisconsin-Madison Architecture Seminar  Center for Silicon System Implementation,
 Department of Electrical and Computer Engineering,
 Carnegie Mellon University seminar
Computer Architecture Lab seminar at Carnegie Mellon (CALCM)


 
 
 
 
 
 
 

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Last modified Tue Jul 30 10:13:14 MET DST 2002