High Performance Computing Group weekly seminar

(Seminari setmanal del Grup de Computació d'Altes Prestacions)

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September 1999

Date Time/Room Speaker Title Paper/Slides
Thu 9 11:30 
C6-E101
Per Stenstrom
Chalmers Univ. of Technology
Gothenburg (Sweden)
On the Interaction between Commercial Workloads and Memory Systems in High-Performance Servers Abstract
Slides
Thu 16 11:30 
C6-E101
Wen-mei Hwu
University of Illinois at Urbana-Champaign USA
IMPACT second generation EPIC architecture Abstract
Slides
Thu 30 12:00 
C6-E101
Miron Livny
University of Wisconsin
The Flight of the Condor - A Decade of High Throughput Computing Abstract
Slides

October 1999

Date Time/Room Speaker Title Paper/Slides
Fri 1 11:30 
C6-E101
Thomas Sterling
California Institute of Technology and NASA Jet Propulsion Laboratory
Emergent Technologies Are Driving a Renaissance in Architecture Innovation Abstract
Biography
Slides
Wed 20 11:30 
C6-E101
Joan Manuel Parcerisa
UPC-DAC
A Cost-Effective Clustered Architecture
In Proc. PACT'99
Paper
Tue 26 17:00 
Sala actes FIB (B6)
Maurice V. Wilkes
AT&T Laboratories Cambridge
How are we doing on Parallel Computing? No slides, 
sorry.

November 1999

Date Time/Room Speaker Title Paper/Slides
Wed 3 11:30 
C6-E101
Ronaldo A. de Lara Gonçalves
Universidade Estadual de Maringa (Brasil)
SEMPRE: Propuesta de una Arquitectura SMT con Capacidad de Ejecucion de Procesos Abstract
Slides
Wed 17 11:30 
C6-E101
All of Us Seminario CAP: que nos gustaria que fuera N/A
Wed 24 11:30 
C6-E101
Mario Nemirovsky
Xstreamlogic
What to do and why in microprocessor research Abstract
Biography
Slides
Wed 24
17:00
Sala actes FIB
(B6)
Gordon Bell
Microsoft Bay Area Research Center
Beyond Moore's Law
Abstract
Biography
Thu  25
16:00
C6-E101
Dimitris Nikolopoulos
HPCLAB - Dept. of Computer Engineering and Informatics
University of Patras
A Case for User-Level Dynamic Page Migration
Abstract
Slides
Fri 26
11:30
C6-E101
Enric Musoll
Xstreamlogic
Predicting the usefulness of a block result: a micro-architectural technique for high-perfomance low-power processors
Abstract
Slides

December 1999

Date Time/Room Speaker Title Paper/Slides
Wed 1 11:30 
C6-E101
Timothy Pinkston
SMART Interconnects Group University of Southern California
Flexible and Efficient Routing Based on Progressive Deadlock Recovery Abstract
Biography
Slides: will be available soon 
Wed 1
12:15
C6-E101
Jose Duato
Universidad Politecnica de Valencia
Critical Issues in Design and Implementation of Interconnects for
Workstation Clusters
Abstract
Biography
Slides
Thu 16 12:00 
C6-E101
Dolors Royo
UPC - DAC
Active Yellow Pages (ActYP): a resource management system for PUNCH Abstract
Wed 22 12:00 
C6-E101
Pau Bofill
UPC - DAC
Separació de senyals musicals amb menys micròfons que instruments
o
Quan la paral.lelització d'algorismes condueix a la seva descomposició
Abstract

January 2000

Date Time/Room Speaker Title Paper/Slides
Thu 13
11:00
C6-E101
G.R. Gao
University of Delaware
From EARTH to HTMT: Evolution of A Multithreaded Architecture Model
Abstract
Biography
Slides
Thu 13
12:00
C6-E101
Gabriel M. Silberman
Centre for Advanced Studies, IBM
Deep Blue: IBM's Massively Parallel Chess Machine
Abstract
Biography
Fri 14
12:00
C6-E101
Gabriel M. Silberman
Centre for Advanced Studies, IBM
Cooperative Research at IBM's Centre for Advanced Studies (CAS)
Abstract
Biography
Mon 17 11:00 
C6-E101
Sally A. McKee
University of Utah
Dept. of Computer Science
Smarter Memory Controllers: Improving Memory System Performance from 
the Bottom Up
Abstract
Biography
Slides will be availble soon
Mon 17
12:00
C6-E101
Binu K. Mathew
University of Utah
Dept. of Computer Science
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
Abstract
Biography
Slides will be available soon
Tue 25 10:00 
C6-E101
John Taylor
QSW
QSW Technologies and Their Implementation in High Performance Clustering Environments. Abstract
Biography
Slides

February 2000

Date Time/Room Speaker Title Paper/Slides
Wed 2 9:30 
C6-E101
Fred Pollack
Intel
New Microarchitecture Challenges in the Coming Generations of CMOS Process Technologies
Slides (PDF)
Wed 2
10:30
C6-E101
Fred Pollack
Intel
Presentacion de Microprocessor Research Labs
Slides
Thu 3
10:00
C6-E101
Ronny Ronen
Intel
XBC - eXtended Block Cache
Slides
Wed 9 12:00 
C6-E101
Ricardo Baeza
U. de Chile - Santiago
Un Modelo y su Arquitectura Software para la Visualización de Documentos en la Web. Abstract
Fri 18 11:30
12:00
C6-E101
Toni Juan
UPC-DAC
11:30 VSSAD :  El grup de recerca que dona suport a Alpha
12:00 Com es Dissenya i Desenvolupa un microprocessador Alpha a Compaq/ADG
No Slides
Wed 23 12:00 
C6-E101
Alex Ramirez
UPC-DAC
Branch Prediction: cómo y porqué Slides

March 2000

Date Time/Room Speaker Title Paper/Slides
Wed 29 12:00 
C6-E101
Theo Ungerer
University of Karlsruhe, Germany
Parallelizing the MPEG-2 Video Decompression for Simultaneous Multithreaded Processors Abstract
Biography
Slides (pdf)

April 2000

Date Time/Room Speaker Title Paper/Slides
Wed 12 12:00 
C6-E101
Marta Jiménez
UPC-DAC
Loop Tiling for Iterative Stencil Computations Abstract
Slides
Wed 26 12:00 
C6-E101
Daniel Tabak
George Mason University, USA
Recent Advances in Computer Architecture Abstract
Slides part1 (pdf)
Slides part2 (pdf)

May 2000

Date Time/Room Speaker Title Paper/Slides
Thu 4
11:15
C6-E101
Paolo Faraboschi
Hewlett-Packard Laboratories Cambridge
The Design of a Technology Platform 
for Custom VLIW Embedded Processors
Abstract
Biography
Slides not available yet
Fri 5
12:00
D6-S103
Mon Beivide
Universidad de Cantabria
Una nueva familia de encaminadores: Bubble Routers
Abstract
Wed 10 12:00 
C6-E101
David Henty
Edinburgh Parallel Computing Centre
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling Abstract
Slides not available yet
Wed 17 11:30 
C6-E101
Agustín Fernández
UPC-DAC
Base de datos de la linea CAP N/A
Wed 24 12:00 
C6-E101
Ramon Canal
UPC-DAC
A Low-Complexity Issue Logic Abstract
Slides (ps)
Wed 31 12:00 
C6-E101
Jim E. Smith
University of Wisconsin-Madison
Architecture Directions for Multi-GHz Processors Abstract
Slides not available yet

June 2000

Date Time/Room Speaker Title Paper/Slides
Thu 1
16:00
C6-E101
Daniele Folegnani
Universita di Genova
Low Power Design strategies
Abstract
Slides
Tue 6 12:00 
C6-E101
Jim Dehnert
SGI
Pro64:  Performance Compilers for IA-64 Abstract
Biography
Slides
Papers
Wed 7 12:00 
C6-E101
Javier  Zalamea
DAC-UPC
Improved Spill Code Generation for Software Pipelined Loops
To be published in PLDI'00
Abstract
Slides
Wed 14 11:00 
C6-E101
Toni Cortés
DAC-UPC
A case for heterogeneous disk arrays
Slides
Wed 28
11:00
C6-E101
Michel Dubois
The Changing Roles of Processors and Memory
No information available
Wed 28
12:00
C6-E101
Nirav Kapadia
Purdue University
The PUNCH Portal to Internet Computing:
Run Any Software Anywhere via WWW Browsers
Abstract
Biography
Slides
Thu 29
11:00
C6-E101
Michel Dubois
Towards Virtually-Addressed Memory Hierarchies
No information available
Thu 29
12:00
C6-E101
Eduardo Sánchez
Laboratoire de Systèmes Logiques
Ecole Polytechnique Fédérale de Lausanne, Suisse
Realización hardware y software del algoritmo de criptografía IDEA: comparación de algunas realizaciones
Abstract
Paper (in french)

July 2000

Date Time/Room Speaker Title Paper/Slides
Thu 6
12:00
C6-E101
Roberto Moreno
Universidad de Las Palmas de Gran Canaria
La teoría de sistemas en la teorización sobre los procesos visuales retinales
Abstract
Fri 7 16:00 
C6-E101
Josep Torrellas
University of Illinois at Urbana-Champaign
Architectural Support for Scalable Speculative Parallelization in Shared-Memory Multiprocessors Abstract
Slides not available yet
Mon 10 12:00 
C6-E101
Burton Smith
President Tera / Cray Inc.
Scaling the Cray MTA Abstract
Biography
Slides
Fri 14 12:00 
C6-E101
Christian Perez
LIP, ENS Lyon
Porting the OpenMP environment Nanos on software DSM systems Abstract
Biography
Slides
Tue 18 11:30 
C6-E101
Tim Lanfear
High Performance Computer Group
Hitachi Europe GmbH
SR8000 Concept Abstract
Biography
Slides
Wed 19
12:00
C6-E101
Chris Koopmans
University of Illinois
The PROMIS Compiler
Abstract
Biography
Tue 25 11:00 
C6-E101
Wolfgang E. Nagel
Dresden University of Technology
Center for High Performance Computing (ZHR)
Performance Optimization on 
High Performance Computers
- A Challenge for Software Tools - 
Abstract
Biography

Any comment? Idea? Proposals? Please contact with David López.
Comentaris? Idees? Propostes de seminaris? Contactar amb David López.
 

Link to the 1998-99 seminar