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1998

• Fermín Sánchez and Jordi Cortadella. Reducing Register Pressure in Software Pipelining. Journal of Information Science and Engineering, Special Issue on Compiler Techniques for High-Performance Computing. To appear in 1998.
• Fermín Sánchez and Jordi Cortadella. Optimal Exploration of the Unrolling Degree in Software Pipelining. Journal of Systems Architecture, Special Issue on Tools and Enviroments for Parallel Program Development. To appear in 1998.
• Enric Pastor and Jordi Cortadella. Efficient Encoding Schemes for Symbolic Analysis of Petri Nets. Design Automation and Test in Europe (DATE'98). Paris (France), February 1998.

1997

• J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, E. Pastor and A. Yakovlev. Decomposition and Technology Mapping of Speed-Independent Circuits Using Boolean Relations. International Conference on Computer-Aided Design, pages 220-227, San Jose (California, USA), November 1997.
• Oriol Roig, Jordi Cortadella, Marco A. Peña and Enric Pastor. Automatic Generation of Synchronous Test Patterns for Asynchronous Circuits. 34th Design Automation Conference, pages 620-625, Anaheim (California - USA), June 1997.
• Alex Semenov, Alex Yakovlev, Enric Pastor, Marco A. Peña and Jordi Cortadella. Synthesis of Speed-Independent Circuits from STG-unfolding Segment. 34th Design Automation Conference, pages 16-21, Anaheim (California - USA), June 1997.
• Alex Semenov, Alex Yakovlev, Enric Pastor, Marco A. Peña, Jordi Cortadella and Luciano Lavagno. Partial Order Based Approach to Synthesis of Speed-Independent Circuits. Third International Symposium on Advanced Research in Asynchronous Circuits and Systems, pages 254-265, Eindhoven (The Netherlands), April 1997.
• Enric Pastor and Fermín Sànchez. La Maquina Rudimentaria: Un procesador Pedagogico (written in Spanish). III Jornadas de Ensenyanza Universitaria sobre Informatica (JENUI'97), Madrid (Spain), June 1997.

1996

• Enric Pastor, Jordi Cortadella, Alex Kondratyev and Oriol Roig. Structural Methods for the Synthesis of Speed-Independent Circuits. Proc. European Design and Test Conference (EDAC-ETC-EuroASIC), March 1996.
• Marco A. Peña and Jordi Cortadella. Combining Process Algebras and Petri Nets for the Specification and Synthesis of Asynchronous Circuits. Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems. Pages 222-232. March 1996.
• Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno and Alex Yakovlev. Methodology and tools for state encoding in asynchronous circuit synthesis, Proc. DAC 96, June 1996.
• Fermín Sánchez and Jordi Cortadella. Maximum-Throughput Software Pipelining Proc. 2nd. Int. Conf. on Massively Parallel Computing Systems Pages 483-490 May 1996
• Fermín Sánchez and Jordi Cortadella. RESIS: A New Methodology for Register Optimization in Software Pipelining Proc. of 2nd. Int. Euro-Par Conference (Euro-Par'96) Volume II, August 1996, pages 824-832. Euro-Par'96 Parallel Processing, Springer Verlag. Lecture Notes in Computer Science, Num. 1124.
• Tomás Lang, Enric Musoll and Jordi Cortadella. Redundant adder for reduced output transitions Proc. of the XI Conference on Design of Integrated Circuits and Systems Sitges (Spain), Oct. 1996.
• Enric Musoll and Jordi Cortadella. Optimizing CMOS circuits for low power using transistor reordering Proc. of the European Design and Test Conference (EDAC) IEEE Computer Society Press, pages 219-223, Paris (France), March 1996.
• Jordi Cortadella, Rosa M. Badia and Fermín Sánchez. A Mathematical formulation of the loop pipelining problem Proc. of the XIth Design of Integrated Circuits and Systems Conf. (DCIS'96) Sitges (Spain), Oct. 1996.

1995

• Enric Pastor, Jordi Cortadella, Alex Kondratyev and Oriol Roig. Cover Approximations for the Synthesis of Speed-Independent Circuits. IFIP TC10, WG 10.5 Workshop on Logic and Architecture Synthesis, December 1995.
• Fermín Sánchez and Jordi Cortadella. Time Constrained Loop Pipelining. Proc. of Int. Conf. on Computer-Aided Design (ICCAD), November 1995, pages 592-596.
• Marco A. Peña and Jordi Cortadella. Programación VLSI y síntesis de circuitos asíncronos mediante composición de redes de Petri. X Congreso de Diseño de Circuitos Integrados y Sistemas, pages 65-70. November 1995 (in Spanish).
• Enric Musoll and Jordi Cortadella. Low-power array multipliers with transition-retaining barriers. Proc. of the International Workshop on Power, Timing Modeling Optimization and Simulation (PATMOS), OFFIS Press, pages 227-238, Oldenburg (Germany), October 1995.
• Enric Musoll and Jordi Cortadella. Scheduling and resource binding for low power. Proc. of the International Symposium on System Synthesis (ISSS), IEEE Computer Society Press, pages 104-109, Cannes (France), September 1995.
• Oriol Roig, Jordi Cortadella and Enric Pastor. Verification of Asynchronous Circuits by BDD-based Model Checking of Petri Nets. 16th International Conference on Application and Theory of Petri Nets, Torino, Jun 1995.
• Oriol Roig, Jordi Cortadella and Enric Pastor. Hierarchical Gate-Level Verification of Speed-Independent Circuits. 2nd Working Conference on Asynchronous Design Methodologies, London, May 1995.
• Enric Musoll and Jordi Cortadella. High-level synthesis techniques for reducing the activity of functional units. Proceedings of the International Symposium on Low-power Design (ISLPD), IEEE Computer Society Press, pages 99-104, Dana Point (USA), April 1995.
• Alex Kondratyev, Jordi Cortadella, Michael Kishinevsky, Enric Pastor, Oriol Roig and Alex Yakovlev. Checking signal transition graph implementability by symbolic BDD traversal. European Design and Test Conference (EDAC-ETC-EuroASIC), pages 325-332. Paris, March 1995.
• Enric Pastor, Jordi Cortadella and Oriol Roig. A new look at the conditions for the synthesis of speed-independent circuits. Fifth Great Lakes Symposium on VLSI, pages 230-235. Buffalo, March 1995.

1994

• Oriol Roig, Enric Pastor and Jordi Cortadella. Verificación de circuitos independientes de la velocidad con modelos simbólicos de redes de Petri. IX Congreso de Diseño de Circuitos Integrados, Las Palmas de Gran Canaria, November 1994.
• Enric Pastor, Oriol Roig, Jordi Cortadella and Rosa M. Badia. Petri net Analysis Using Boolean Manipulation. 15th International Conference on Application and Theory of Petri Nets, Zaragoza, June 1994.
• Oriol Roig, Enric Pastor and Jordi Cortadella. Symbolic Model-Checking of Petri Nets for Speed-Independent Circuits. ACiD-WG/EXACT Workshop on Asynchronous Low-Power VLSI, April 1994.
• Fermí Sànchez and Jordi Cortadella. Resource-Constrained Software Pipelining for High-Level Synthesis of DSP Systems. Algorithms and Parallel VLSI Architectures III. Elsevier Science B.V., The Netherlands, Edited by Marc Moonen and Francky Catthoor, 1995, pages 377-388.

1993

• Oriol Roig, Enric Pastor, Jordi Cortadella and Rosa M. Badia. Síntesis de Máquinas de Control para Circuitos Asíncronos. VIII Congreso de Diseño de Circuitos Integrados, November 1993.
• Enric Pastor and Jordi Cortadella. Polynomial Algorithms for the Synthesis of Hazard-Free Circuits from Signal Transition Graphs. IEEE International Conference on Computer-Aided Design, pages 250-254, November 1993.
• Enric Pastor and Jordi Cortadella. An Efficient Unique State Coding Algorithm for Signal Transition Graphs. IEEE International Conference on Computer Design, pages 174-177, October 1993.
• Fermín Sánchez and Jordi Cortadella. Resource-Constrained Pipelining Based on Loop Transformations. Proceedings EUROMICRO 93. Open System Design: Hardware, Software and Applications. Pages 429-436. September 1993.
• Rosa M. Badia and Jordi Cortadella. GLASS: a Graph-Theoretical Approach for Global Binding. Proceedings EUROMICRO 93. Open System Design: Hardware, Software and Applications. Pages 775-782. September 1993.
• Rosa M. Badia and Jordi Cortadella. High-Level Synthesis of Asynchronous Systems: Scheduling and Process Synchronization. European Design Automation Conference. Pages 70-74. February 1993.

1992

• Rosa M. Badia, Jordi Cortadella, Enric Pastor and Abelardo Pardo. A High-Level Synthesis System for Asynchronous Circuits. Sixth International Workshop on High-Level Synthesis. Pages 87-94. November 1992.

1991

• Rosa M. Badia, Jordi Cortadella and Eduard Ayguadé. Computer-Aided Synthesis of Data-path by using a Simulated Annealing Based Approach. Ninth IASTED International Symposium on APPLIED INFORMATICS, February 1991.
• Rosa M. Badia and Jordi Cortadella. Optimización del tiempo de ciclo en la planificación de operaciones. VI Congreso de Diseño de Circuitos Integrados, November 1991.

Last modified: April 1998