Dr. Rajkumar Buyya is an Associate Professor and Reader of Computer Science and Software Engineering; and Director of the Grid Computing and Distributed Systems (GRIDS) Laboratory at the University of Melbourne, Australia. He received "Research Excellence Award" from the University of Melbourne for productive and quality research in computer science and software engineering in 2005. The CiteSeer Research Index in August 2006 ranked Dr. Buyya's research work among the top 0.73% most cited authors in Computer Science (and 0.28% in the list with article citation counts normalized by publication year) out of 790,329 authors in the database.
Dr. Buyya has received, over $2 million, competitive research grants from various national and international organisations including the Australian Research Council (ARC), Sun Microsystems, StorageTek, IBM, and Microsoft, Australian DEST (Dept. of Education, Science and Training), and the European Council. Dr. Buyya has authored/co-authored over 180 publications. He is serving as an Associate Editor of the Future Generation Computer Systems Journal, Elsevier Press, The Netherlands. He is also serving as the Chair of the IEEE Technical Committee on Scalable Computing (TCSC).
Dr. Buyya has co-founded and chaired four IEEE/ACM international conferences: CCGrid, Cluster, Grid, and E-Science. He has presented over 140 invited talks (keynotes, tutorials, and seminars) on his vision on IT Futures and advanced computing technologies in several international conferences and institutions in Asia, Australia, Europe, North America, and South America. For further information on Dr. Buyya, please browse: http://www.buyya.com

Israel Koren is a Professor of Electrical and Computer Engineering at the University of Massachusetts, Amherst and a fellow of the IEEE. He has been a consultant to many companies including IBM, Analog Devices, Intel, AMD and National Semiconductors. His research interests include Fault-Tolerant systems, VLSI yield and reliability, secure cryptographic systems, and Computer Arithmetic. He publishes extensively and has over 200 publications in refereed journals and conferences. He is an Associate Editor of the IEEE Transactions on VLSI Systems, the VLSI Design Journal, and the IEEE Computer Architecture Letters. He served as General Chair, Program Chair and Program Committee member for numerous conferences. He is a co-author of the textbook "Fault Tolerant Systems," Morgan-Kaufman, 2007, the author of the textbook "Computer Arithmetic Algorithms," 2nd Edition, A.K. Peters, Ltd., 2002.

Walid A. Najjar is a Professor in the Department of Computer Science and Engineering at the University of California Riverside. His research insterests are in the fields of computer architecture and compiler optimizations, embedded systems and sensor networks. Lately, he has been very acrive in the are of compilation for FPGA-based code acceleration and reconfigurable computing. His research has been supported by NSF, DARPA and various industry sponsors. He received a B.E. in Electrical Engineering from the American University of Beirut in 1979 and the M.S. and Ph.D. in Computer Engineering from the University of Southern California in 1985 and 1988 respectively. He was on the faculty of the Department of Computer Science at Colorado State University (1989 to 2000), before that he was with the USC-Information Sciences Institute. He has served on the program committees for a number of leading conferences in this area including CASES, ISSS-CODES, DATE, HPCA, MICRO and FPL.

Guri Sohi received a Ph.D in Electrical and Computer Engineering from the University of Illinois in 1985. He has been a faculty member at the University of Wisconsin-Madison since graduation, and is currently the John P. Morgridge Professor and the E. David Cronon Professor of Computer Sciences, and the Chair of the Computer Sciences Department. Sohi's research has been in the design of high-performance microprocessors and computer systems. Topics that he has investigated in the past or continues to investigate include include dynamically-scheduled instruction-level parallel processors, out-of-order execution with precise exceptions, non-blocking caches, decentralized microarchitectures, speculative multithreading, computation reuse, memory dependence speculation and prediction, and multicore microprocessors. Results from his research can be found in almost every high-end microprocessor in the market today.
He received the 1999 ACM SIGARCH Maurice Wilkes award "for seminal contributions in the areas of high issue rate processors and instruction level parallelism". At the University of Wisconsin he was selected as a Vilas Associate in 1997, awarded the WARF Kellett Mid-Career Faculty Researcher award in 2000, and was selected as a WARF Named Professor in 2007. He is a Fellow of both the ACM and the IEEE.

Malgorzata (Gosia) Steinder is a Research Staff Member at IBM T. J. Watson Research Center. She is leading a team working on applying virtualization technologies to simplify systems management. She has also worked on dynamic resource allocations, in particular contributing dynamic application placement techniques to WebSphere eXtended Deployment. She holds a MSc from AGH University of Science and Technology and a PhD from University of Delaware.

El Dr. Adolfo Guzmán Arenas es Ingeniero en Comunicaciones y Electrónica de la Escuela Superior de Ingeniería y Mecánica y Eléctrica del Instituto Politécnico Nacional. Obtuvo su Maestría y su Doctorado en Ciencias de la Computación en el Instituto Tecnológico de Massachusetts, en Cambridge, Massachusetts, EE.UU.
Fue profesor del Departamento de Ingeniería Eléctrica del M.I.T.; del Departamento de Inteligencia Mecánica de la Universidad de Edimburgo; del Centro de Investigación y Estudios Avanzados del I.P.N., donde fundó la Maestría y Doctorado en Computación; del Instituto de Investigación en Matemáticas Aplicadas y Sistemas, de la U.N.A.M., donde fue Jefe del Departamento de Computación; y de la Unidad Interdisciplinaria (UPIICSA) del I.P.N.
Fue Director del Centro Científico IBM para América Latina, IBM de México, S.A.
Ha sido Investigador de la empresa MicroElectronics and Computer Corporation (MCC); Vicepresidente de Ingeniería en International Software Systems, y fundador y Presidente de SoftwarePro International, empresa en Austin, Texas, dedicada al desarrollo de paquetes comerciales y herramientas de Ingeniería de Software, el más reciente siendo BiblioDigital©, una biblioteca digital distribuida.
En 1994 recibió el Premio Nacional de Informática, que otorga la Academia Mexicana de Informática.
Recibió en 1996 de manos del Presidente Zedillo el Premio Nacional de Ciencias y Artes. Y de sus mismas manos, en 1997, la Presea "Lázaro Cárdenas".
Fundó en 1996 el Centro de Investigación en Computación (CIC) del I.P.N. y lo dirigió hasta 2002. En ese año fue nombrado Fellow of the Association for Computing Machinery (ACM), y durante 2003-2006 fue miembro del ACM Publications Board. Actualmente trabaja en el CIC en el uso de Inteligencia Artificial en minería de datos, procesamiento semántico y aplicaciones de sistemas de información. También se interesa en Visión y Reconocimiento de Patrones.
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Nader Bagherzadeh has been involved in research and development in the areas of: computer architecture, reconfigurable computing, VLSI chip design, Network-on-Chip (NoC), and computer graphics. Almost 15 years ago, he was the first researcher working on the VLSI design of a Very Long Instruction Word (VLIW) processor. Since then, he has been working on multithreaded superscalars and their application to signal processing and general purpose computing, as well as reconfigurable processors. His current project at UC, Irvine is concerned with the design of NoC for DSP applications.
Dr. Bagherzadeh for 5 years was the Chair of Department of Electrical Engineering and Computer Science in the Henry Samueli School of Engineering at University of California, Irvine. Before joining UC, Irvine, from 1979 to 1984, he was a member of the technical staff (MTS) at AT&T Bell Laboratories, developing the hardware and software components of the next-generation digital switching systems (#5 ESS). Dr. Bagherzadeh holds a Ph.D. in computer engineering from The University of Texas at Austin. As a Professor, he has published more than a hundred articles in peer-reviewed journals and conference papers in areas such as advanced computer architecture, system software techniques, and high performance algorithms. He has trained hundreds of students who have assumed key positions in software and computer systems design companies in the past twelve years. He has been a Principal Investigator (PI) or Co-PI on more than 2.5 million dollars worth of research grants for developing next generation computer systems for solving computationally intensive applications related to signal and image processing.

Daniel P. Bovet and Marco Cesati have been working together from several years in the System Programming Research Group of the University of Rome "Tor Vergata", where they teach courses in operating systems and networking. Daniel and Marco are the authors of the well-known O'Reilly book "Understanding the Linux kernel".

James E. Smith is a professor in the Department of Electri- cal and Computer Engineering at the University of Wisconsin- Madison. He received his PhD from the University of Illi- nois. In 1976 he joined the faculty of the University of Wisconsin-Madison, teaching and conducting research -- first in fault-tolerant computing, then in computer architecture. He has been involved in a number of computer research and development projects both as a faculty member at Wisconsin and in industry (Control Data Corporation, Astronautics Cor- poration, Cray Research). Currently, he and his research group are studying the virtual machine abstraction as a technique for providing high performance and power effi- ciency through co-design and tight coupling of virtual machine hardware and software. Prof. Smith received the ACM/IEEE 1999 Eckert-Mauchly Award for contributions to the field of computer architecture. He is co-author with Ravi Nair of a book on virtual machines published by Morgan-Kaufmann.

Govindarajan Ramaswamy received his B.Sc. degree in Mathematics from Madras University in 1981 and B.E. (Electronics and Communication) and Ph.D. (Computer Science) degrees from the Indian Institute of Science, Bangalore in 1984 and 1989 respectively. He has held post-doctoral and faculty positions in Canadian Universities between 1989-95. Since 1995 he has been a faculty in the Supercomputer Education and Research Centre and the Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India. His research interests are in the areas of High Performance Computing, compilation techniques for instruction-level parallelism, and computer architecture.

Uri Weiser received the bachelor and master degrees in Electrical Engineering from the Technion, Israel Institute of Technology, Haifa, Israel in 1970 and 1975 respectively. He received his Ph.D in Computer Science from the University of Utah, Salt Lake City, in 1981.
Since 2007, Dr. Weiser is the CTO of Commex-Technologies, an Israeli start-up developing Silicon/SW technology to significantly accelerate computer platform performance and reduce power consumption.
Dr. Weiser worked at Intel from 1988-2006. At Intel, he started as the architecture group leader at Intel's Design Center in Haifa, Israel. He initialized the Pentium® processor definition via thorough feasibility studies and a simulator. As the Director of the Platform Architecture Center in Santa Clara, Calif., during 1990-1991, Weiser led Intel's microprocessor roadmap activities. In 1992, he became director of the Israel architecture group and drove the definition of Intel's MMX technology architecture. During 1999-2000, he co-managed the new Intel Microprocessor Design Center in Austin, Texas. In 2003 Weiser formed a new research group at Intel Israel targeted at PC architecture/Microarchitecture solutions for Advanced Media applications.
Dr. Weiser was appointed an Intel Fellow in 1996, in 2002 he became an IEEE Fellow and in 2005 an ACM Fellow.
Prior to his career at Intel, Weiser worked for the Israeli Department of Defense (RAFAEL) from 1970 to 1984, as a research engineer, and system engineer. His next position was with National Semiconductor Design Center in Israel from 1984 to 1988, where he led the design of the NS32532 microprocessor.
Weiser holds an Adjunct Professor position at EE department, Technion IIT. He is a thesis advisor of 2 Ph.D and 2 M.Sc students, and is one of the leaders of the MATRICS research at the Technion. Dr. Weiser teaches the advanced VLSI Architecture gradate course.
He was an Associate Editor of IEEEMicro Magazine (1992-2004) and is an editorial board member of Computer Architecture Letters. Weiser was active in many technical committees of conferences, including ISCA, MICRO, Hot Chips, CompEuro, and ICCD. He is a member of SIGARCH Wilkes nomination award committee. Dr. Weiser has published more than 25 papers, and 6 patents.
Uri's personal Interests: Diving (certified diver; 2 stars), flying (private pilot license: "group A"), sailing (certified Skipper), performing art (watching) and teaching.

Jack Dongarra holds an appointment as University Distinguished Professor of Computer Science in the Computer Science Department at the University of Tennessee and holds the title of Distinguished Research Staff in the Computer Science and Mathematics Division at Oak Ridge National Laboratory (ORNL), and an Adjunct Professor in the Computer Science Department at Rice University. He specializes in numerical algorithms in linear algebra, parallel computing, use of advanced-computer architectures, programming methodology, and tools for parallel computers. His research includes the development, testing and documentation of high quality mathematical software. He has contributed to the design and implementation of the following open source software packages and systems: EISPACK, LINPACK, the BLAS, LAPACK, ScaLAPACK, Netlib, PVM, MPI, NetSolve, Top500, ATLAS, and PAPI. He has published approximately 200 articles, papers, reports and technical memoranda and he is coauthor of several books. He is a Fellow of the AAAS, ACM, and the IEEE and a member of the National Academy of Engineering.

Emery Berger is an Assistant Professor at the University of Massachusetts Amherst. He received his Ph.D. at the University of Texas at Austin in 2002. Berger's research focuses on improving the performance and reliability of modern computer systems. His work spans programming languages, runtime systems, and operating systems, with a particular focus on memory management. Berger is the creator of Hoard, a widely-used scalable memory manager, and is part of a research group singled out by NSF site visitors as the best memory management group in the country. He leads the PLASMA group at UMass and is a 2004 NSF CAREER Award recipient. For more information, visit Emery Berger's home page.