PACT
2001, pact2001@ac.upc.es

Dragon fountain (Park Guell). Gaudi, 1900-14.

Barcelona, Spain

September 8-12, 2001

 

Final Program

Saturday, September 8, 2001.

EWOMP'01 (full day). European Workshop on OpenMP.

WBT'01 (full day). Workshop on Binary Translation.

MEDEA'01 (half day, morning). Workshop on Memory Access Decoupled Architectures.

Sunday, September 9, 2001.

EWOMP'01 (full day). Continuation from previous day.

COLP'01 (full day). Workshop on Compilers and Operating Systems for Low Power.

WUCC'01 (half day, morning). Workshop on Ubiquitous Computing and Communication.

Tutorial (full day):
The Design and Implementation of the Jalapeño JVM. Michael Hind and Dick Attanasio (IBM Research).

20:00 - Welcoming Reception

Monday, September 10, 2001.

08:45 - Conference Opening

09:00 - Keynote Address: Influence of Technology Directions on System Architecture. Randall D. Isaac (VP Science and Technology, IBM Research).

10:00 - Session 1: Simulation and Modeling

Session chair: Steve Keckler, U. of Texas-Austin

"Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications".
Tim Sherwood, Erez Perelman and Brad Calder, (University of California, San Diego)

"Modeling Superscalar Processors via Statistical Simulation".
Sebastien Nussbaum and James Smith (Dept. of Electrical and Computer Engineering,University of Wisconsin-Madison)

"Hybrid Analytical-Statistical Modeling for Efficiently Exploring Architecture and Workload Design Spaces".
Lieven Eeckhout and Koen De Bosschere (Department of Electronics and Information Systems, Ghent University)

11:30 - Coffee Break

12:00 - Session 2: Efficient Caches

Session chair: Brad Calder, U. C. San Diego

"Filtering Techniques to Improve Trace-Cache Efficiency".
Roni Rosner, Avi Mendelson and Ronny Ronen (Israel Design Center, Intel)

"Reactive-Associative Caches".
Brannon Batson (1) and T. Vijaykumar (2).
(1) Compaq and (2) Purdue University

"Adaptive Mode Control: A Static-Power-Efficient Cache Design".
Huiyang Zhou, Mark Toburen, Eric Rotenberg and Thomas Conte (North Carolina State University)

13:30 - Lunch Break

15:00 - Session 3: Specialized Instruction Sets

Session chair: Jim Dehnert, Transmeta

"Implementation and Evaluation of the Complex Streamed Instruction Set".
Ben Juurlink (1), Dmitri Tcheressiz (2), Stamatis Vassiliadis (1), Harry Wijshoff (2).
(1) Computer Engineering Laboratory, Electrical Engineering Department, Delft University of Technology, Delft. (2) Department of Computer Science, Leiden University, Leiden.

"On the Efficiency of Reductions in micro-SIMD media extensions".
Jesus Corbal, Roger Espasa, and Mateo Valero (Computer Architecture Department, UPC)

17:00 - Excursion to Montserrat and Reception at Cavas Vinery

Tuesday, September 11, 2001.

09:00 - Keynote Address: Electronics in The Internet Age. Justin Rattner (Intel Fellow and Director of Microprocessor Research Labs).

10:00 - Session 4: Prediction and Recovery

Session chair: Antonio Gonzalez, UPC

"Boolean Formula-based Branch Prediction for Future Technologies".
Daniel Jimenez (1), Heather Hanson (2) and Calvin Lin (1).
(1) Department of Computer Sciences, The University of Texas at Austin. (2) Department of Electrical & Computer Engineering, The University of Texas at Austin.

"Using Dataflow Based Context for Accurate Value Prediction".
Renju Thomas and Manoj Franklin (University of Maryland)

"Recovery mechanism for latency misprediction".
Enric Morancho, Jose Maria Llaberia and Angel Olive (Computer Architecture Department, UPC)

11:30 - Coffee Break

12:00 - Session 5: Memory Optimization

Session chair: Bilha Mendelson, IBM

"A Cost Framework for Evaluating Integrated Restructuring Optimizations".
Bharat Chandramouli, John Carter, Wilson Hsieh and Sally McKee (University of Utah)

"Compiling for the Impulse Memory Controller".
Xianglong Huang, Zhenlin Wang and Kathryn McKinley (Computer Science Dept., University of Massachusetts, Amherst)

"On the Stability of Temporal Data Reference Profiles".
Trishul Chilimbi (Microsoft Research)

13:30 - Lunch Break

15:00 - Session 6: Program Optimization

Session chair: Sally McKee, U. of Utah

"Code Reordering and Speculation Support for Dynamic Optimization Systems".
Erik Nystrom, Ronald Barnes, Matthew Merten and Wen-mei Hwu (University of Illinois)

"A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors".
Josep Codina, Jesus Sanchez and Antonio Gonzalez (Computer Architecture Department, UPC)

"Cache-Friendly Implementations of Transitive Closure".
Michael Penner and Viktor Prasanna (University of Southern California)

16:30 - Coffee Break

17:00 - Session 7: Technology Implications

Session chair: Antonio Gonzalez, UPC.

"Exploring the Design Space of Future CMPs".
Jaehyuk Huh, Doug Burger and Stephen Keckler (University of Texas at Austin)

"Area and System Clock Effects on SMT/CMP Processors".
James Burns (Intel) and Jean-Luc Gaudiot (USC)

18:15 - Work in Progress Session

21:00 - Conference Banquet (Hilton Hotel)

Wednesday, September 12, 2001.

09:00 - Keynote Address : EV8: The Post-ultimate Alpha. Joel Emer (Intel Fellow, Intel Architecture Group Director).

10:00 - Session 8: Parallel Machines

Session chair: Kemal Ebcioglu, IBM

"Limits on Speculative Module-level Parallelism in Imperative and Object-oriented Programs on CMP Platforms".
Fredrik Warg and Per Stenstrom (Chalmers University of Technology)

"Compiler and Runtime Analysis for Efficient Communication in Data Intensive Applications".
Renato Ferreira (1), Gagan Agrawal (2) and Joel Saltz (1).
(1) University of Maryland, (2) University of Delaware

"Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors”.
Maria Jesus Garzaran (1), Milos Prvulovic (2), Ye Zhang (2), Alin Jula (3), Hao Yu (3), Lawrence Rauchwerger (3) and Josep Torrellas (2).
(1) Universidad de Zaragoza, Spain, (2) University of Illinois at Urbana-Champaign, (3) Texas A&M University

11:30 - Coffee Break

12:00 - Session 9: Data Prefetching

Session chair: Eduard Ayguade, UPC

"Optimizing Software Data Prefetches with Rotating Registers".
Gautam Doshi, Rakesh Krishnaiyer and Kalyan Muthukumar (Intel Corporation)

"Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes".
Nicholas Kohout (1), Seungryul Choi (2), Dongkeun Kim (3), Donald Yeung (3).
(1) Intel Corp., (2) Department of Computer Science, University of Maryland at College Park, (3) Department of Electrical and Computer Engineering, University of Maryland at College Park

"Data Flow Analysis for Software Prefetching Linked Data Structures in Java".
Brendon Cahoon and Kathryn McKinley (University of Massachusetts)

"Comparing and Combining Read Miss Clustering and Software Prefetching".
Vijay Pai (1) and Sarita Adve (2).
(1) Rice University, (2) University of Illinois

14:00 - Final Conference Address

 

Sponsored by:

IEEE TCCA, IEEE TCPP, ACM SIGARCH, & IFIP Working Group 10.3

Edited and Designed by Eduard Ayguade