El doctor Michael Lindig realizó estudios de Ing. en Comunicaciones y Electrónica en la Escuela Superior de Ingenieria Mecanica y Electrica del Instituto Politecnico Nacional, en Mexico D.F. Posteriormente realiza una Maestria en Ingenieria en la especialidad en Sistemas Digitales en la Universidad Nacional Autonoma de Mexico.
Se doctoró en la Universidad Nacional Autónoma de Mexico en Ingenieria en 1996.
Cuenta con mas de 60 publicaciones en revistas y congresos.
Areas de interes:
Aplicaciones de Microprocesadores en medición y control, Disenyo de sistemas
digitales, Procesadores dedicados.
Cargo actual:
Director del Centro de Investigación y Desarrollo Tecnológico en Computo
del Instituto Politecnico Nacional de Mexico.
Sanjay J. Patel received a PhD from the University of Michigan, Ann Arbor in May, 1999. His research interests include trace caches, branch prediction, memory bandwidth issues, and the performance simulation of microarchitectures. He received a BS and a MS from the University of Michigan and has done hardware verification, logic design, and performance modelling at Digital Equipment Corporation, Intel, and HAL Computer Systems.
Rajkumar Buyya is a Research Scholar at the School of Computer Science and Softw are Engineering, Monash University, Melbourne, Australia. He was awarded Dharma Ratnakara Memorial Trust Gold Medal for his academic excellence during 1992 by K uvempu/Mysore University. He is co-author of books: Mastering C++ and Microproce ssor x86 Programming; and recently, he has edited a two volume book on High Perf ormance Cluster Computing: Architectures and Systems (Vol. 1); Programming and A pplication (Vol.2) published by Prentice Hall, USA. He served as Guest Editor fo r the special issues of international journals: Parallel and Distributed Computi ng Practices, Informatica: An International Journal of Computing and Informatics , and Journal of Supercomputing.
Rajkumar is a speaker in the IEEE Computer Society Chapter Tutorials Program and Chairman of the IEEE Computer Society Task Force on Cluster Computing. He has c ontrbuted to the development of HPCC system software environment for PARAM super computer developed by the Centre for Development of Advanced Computing, India.
Buyya has lectured on advanced technologies such as Parallel, Distributed and Mu ltithreaded Computing, Client/Server Computing, Internet and Java, Cluster Compu ting, and Java and High Performance Computing in many international conferences held in Korea, India, Singpore, USA, Mexico, Australia, and Norway. His research papers have appeared in international conferences and journals. He can be reach ed by: rajkumar@ieee.org or Internet access: http://www.dgs.monash.edu.au/~rajku mar
Daniel A. Connors is currently a Ph.D. candidate specializing in Computer Architecture and Advanced Compiler Technology at the University of Illinois, Urbana-Champaign. He received a B.S. in Electrical Engineering from Purdue University and a M.S. from the University of Illinois. As a member of the IMPACT research group, he has developed compilation techniques for control speculation, data speculation, and predicated execution in EPIC architectures. He has spent four summers working at Intel on IA-64 compilation and architecture design, and one summer working at Hewlett-Packard Laboratories on embedded architecture research. His research interests include compiler-directed branch prediction, dynamic instruction reuse, embedded architecture design, predicated execution, instruction-level parallelism, and optimizing compilers.